Method for manufacturing semiconductor device

ABSTRACT

An object is to provide a semiconductor device including an oxide semiconductor, which has stable electrical characteristics and high reliability. In a manufacturing process of a bottom-gate transistor including an oxide semiconductor layer, heat treatment in an atmosphere containing oxygen and heat treatment in vacuum are sequentially performed for dehydration or dehydrogenation of the oxide semiconductor layer. In addition, irradiation with light having a short wavelength is performed concurrently with the heat treatment, whereby elimination of hydrogen, OH, or the like is promoted. A transistor including an oxide semiconductor layer on which dehydration or dehydrogenation treatment is performed through such heat treatment has improved stability, so that variation in electrical characteristics of the transistor due to light irradiation or a bias-temperature stress (BT) test is suppressed.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a method for manufacturing asemiconductor device including an oxide semiconductor.

In this specification, a semiconductor device means all types of deviceswhich can function by utilizing semiconductor characteristics, and anelectro-optical device, a semiconductor circuit, and an electronicdevice are all semiconductor devices.

2. Description of the Related Art

A technique for forming a transistor by using a semiconductor thin filmformed over a substrate having an insulating surface has attractedattention. Such a transistor is applied to a wide range of electronicdevices such as an integrated circuit (IC) or an image display device(display device). As a semiconductor thin film applicable to thetransistor, a silicon-based semiconductor material is widely known.Moreover, an oxide semiconductor has been attracting attention asanother material.

For example, a transistor whose active layer includes an amorphous oxidecontaining indium (In), gallium (Ga), and zinc (Zn) and having anelectron carrier concentration of lower than 10¹⁸ /cm³ is disclosed (seePatent Document 1).

REFERENCE Patent Document

[Patent Document 1] Japanese Published Patent Application No.2006-165528

SUMMARY OF THE INVENTION

In some cases, electrical characteristics of an oxide semiconductor anda device including the oxide semiconductor are significantly changedowing to incorporation of impurities in a formation process thereof. Atransistor including an oxide semiconductor shows unstablecharacteristics due to light irradiation or a bias-temperature stresstest (a BT test) when, in particular, incorporation of hydrogen,moisture, or the like into the transistor occurs. That is, incorporationof impurities into an oxide semiconductor becomes a factor of reducingthe reliability of a device.

In view of the above problems, an object of one embodiment of thepresent invention is to provide a semiconductor device including anoxide semiconductor, which has stable electrical characteristics andhigh reliability.

One embodiment of the present invention disclosed in this specificationis to dehydrate or dehydrogenate an oxide semiconductor by sequentiallyperforming heat treatment in an atmosphere containing oxygen and heattreatment in vacuum. In addition, irradiation with light having a shortwavelength is performed concurrently with the heat treatment, wherebyelimination of hydrogen, OH, or the like is promoted.

One embodiment of the present invention disclosed in this specificationis a method for manufacturing a semiconductor device, including thesequential steps of: forming a gate electrode layer; forming a gateinsulating layer over the gate electrode layer; forming an oxidesemiconductor layer over the gate insulating layer so as to overlap withthe gate electrode layer; increasing the temperature of the oxidesemiconductor layer in an inert gas atmosphere, a dry air atmosphere, oran oxygen atmosphere; performing heat treatment in an oxygen atmosphere;performing heat treatment under reduced pressure; performing slowcooling in an oxygen atmosphere; forming a source electrode layer and adrain electrode layer which are electrically connected to the oxidesemiconductor layer; and forming an insulating layer over the oxidesemiconductor layer, the source electrode layer, and the drain electrodelayer.

Another embodiment of the present invention disclosed in thisspecification is a method for manufacturing a semiconductor device,including the sequential steps of: forming a gate electrode layer;forming a gate insulating layer over the gate electrode layer; formingan oxide semiconductor layer over the gate insulating layer so as tooverlap with the gate electrode layer; increasing the temperature of theoxide semiconductor layer in an inert gas atmosphere, a dry airatmosphere, or an oxygen atmosphere; performing heat treatment underreduced pressure; performing heat treatment in an oxygen atmosphere, andthen performing slow cooling in the oxygen atmosphere; forming a sourceelectrode layer and a drain electrode layer which are electricallyconnected to the oxide semiconductor layer; and forming an insulatinglayer over the oxide semiconductor layer, the source electrode layer,and the drain electrode layer.

In the above manufacturing method, the dew point of an atmosphere gasused in increasing the temperature, performing the heat treatment, andperforming the slow cooling is −50° C. or lower, preferably −70° C. orlower, more preferably −80° C. or lower. The use of an atmosphere gashaving a low dew point can prevent incorporation of impurities such asmoisture into the oxide semiconductor as much as possible.

The temperature of the above heat treatment is higher than or equal to250° C. and lower than or equal to 650° C., preferably higher than orequal to 350° C. and lower than or equal to 500° C., more preferablyhigher than or equal to 390° C. and lower than or equal to 460° C.

The above heat treatment may be performed in the state where the oxidesemiconductor layer is irradiated with light having a wavelength longerthan or equal to 350 nm and shorter than or equal to 450 nm. Byirradiation with light having the above wavelength, a bond of a metalcomponent and a hydrogen atom or a hydroxyl group in the oxidesemiconductor layer is easily cut, so that dehydration ordehydrogenation can be performed easily.

The above heat treatment under reduced pressure and the above heattreatment in the oxygen atmosphere under dry condition may be repeated aplurality of times. By repeatedly performing the heat treatments, theamount of remaining hydrogen and moisture can be reduced.

After the above slow cooling, the oxide semiconductor layer may besubjected to oxygen doping treatment. Through the oxygen dopingtreatment, oxygen deficiency in the oxide semiconductor layer can becompensated and the oxide semiconductor layer can be brought into anoxygen-excess state.

According to one embodiment of the present invention, an oxidesemiconductor layer is dehydrated or dehydrogenated through heattreatment. A transistor including the oxide semiconductor layer hasimproved stability, so that variation in electrical characteristics ofthe transistor due to light irradiation or a bias-temperature stress(BT) test is suppressed. Therefore, a transistor having stableelectrical characteristics and a semiconductor device including thetransistor can be manufactured.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A to 1C illustrate one example of a semiconductor device.

FIGS. 2A to 2C illustrate one example of a method for manufacturing asemiconductor device.

FIGS. 3A to 3D each illustrate one example of a semiconductor device.

FIG. 4 illustrates one example of a heat treatment apparatus.

FIGS. 5A to 5C each illustrate one example of a semiconductor device.

FIG. 6 illustrates one example of a semiconductor device.

FIG. 7 illustrates one example of a semiconductor device.

FIG. 8 illustrates one example of a semiconductor device.

FIGS. 9A and 9B illustrate one example of a semiconductor device havingan image sensor function.

FIGS. 10A and 10B illustrate an electronic device and a block diagram ofthe electronic device.

FIGS. 11A to 11F each illustrate an electronic device.

FIG. 12 shows TDS measurement results.

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, embodiments of the invention disclosed in thisspecification will be described in detail with reference to theaccompanying drawings. Note that the present invention is not limited tothe following description, and it is easily understood by those skilledin the art that modes and details of the present invention can bemodified in various ways. Therefore, the invention disclosed in thisspecification is not construed as being limited to the description ofthe following embodiments. Note that the ordinal numbers such as “first”and “second” in this specification are used for convenience and do notdenote the order of steps or the stacking order of layers. In addition,the ordinal numbers in this specification do not denote particular nameswhich specify the present invention.

Embodiment 1

In this embodiment, one embodiment of a semiconductor device and amethod for manufacturing the semiconductor device will be described withreference to FIGS. 1A to 1C, FIGS. 2A to 2C, and FIGS. 3A to 3D. In thisembodiment, a transistor including an oxide semiconductor layer will bedescribed as an example of the semiconductor device.

FIGS. 1A to 1C are a plan view and cross-sectional views, of abottom-gate transistor as an example of a semiconductor device. FIG 1Ais a plan view, FIG. 1B is a cross-sectional view taken along line A-Bof FIG. 1A, and FIG. 1C is a cross-sectional view taken along line C-Dof FIG. 1A. Note that a gate insulating layer 402 is omitted in FIG. 1A.

A transistor 410 illustrated in FIGS. 1A to 1C includes, over asubstrate 400 having an insulating surface, a gate electrode layer 401,the gate insulating layer 402, an oxide semiconductor layer 403, asource electrode layer 405 a, and a drain electrode layer 405 b.

Over the transistor 410, an insulating layer may be provided. In orderto electrically connect the source electrode layer 405 a or the drainelectrode layer 405 b to a wiring, an opening may be formed in the gateinsulating layer 402 or the like. A second gate electrode layer may beprovided above the oxide semiconductor layer 403. The oxidesemiconductor layer 403 is desirably processed into an island shape butis not necessarily processed into an island shape.

Note that in a conventional transistor including an oxide semiconductor,the purity of an oxide semiconductor layer is low. For example, in somecases, electrical characteristics of the transistor become unstableowing to hydrogen, moisture, or the like in the oxide semiconductorlayer.

In such a transistor, when a positive voltage is applied to a gateelectrode, hydrogen ions having positive charge which exist in the oxidesemiconductor layer are transferred to the back channel side (the sideopposite to the gate insulating layer), and accumulated in the oxidesemiconductor layer side of an interface between the oxide semiconductorlayer and the insulating layer. The positive charge is transferred fromthe accumulated hydrogen ion to a charge trapping center (such as ahydrogen atom, water, or contamination) in the insulating layer, wherebynegative charge is accumulated in the back channel side of the oxidesemiconductor layer. In other words, a parasitic channel is generated onthe back channel side of the transistor, and the threshold voltage isshifted to the negative side, so that the transistor tends to benormally on.

In order to suppress variation in electrical characteristics of thetransistor, it is important that there be no impurity functioning as acharge trapping center or the quantity of such impurities be extremelysmall in the insulating layer. Therefore, a sputtering method throughwhich less hydrogen is contained in film formation is preferably usedfor formation of the insulating film. In an insulating film formed by asputtering method, there is no impurity functioning as a charge trappingcenter or the quantity of such impurities is extremely small, and thus,the transfer of positive charge is less likely to occur as compared withan insulating film formed by a CVD method or the like. Accordingly, theshift of the threshold voltage of the transistor can be suppressed andthe transistor can be normally off.

On the other hand, when a negative voltage is applied to the gateelectrode, hydrogen ions which exist in the oxide semiconductor layerare transferred to the gate insulating layer side and are accumulated inthe oxide semiconductor layer side of the interface between the oxidesemiconductor layer and the gate insulating layer. As a result, thethreshold voltage of the transistor is shifted to the negative side.

In a state where a gate voltage is set to 0, the positive charge isreleased from the charge trapping center, so that the threshold voltageof the transistor is shifted to the positive side, thereby returning tothe initial state. Alternatively, the threshold voltage is shifted tothe positive side beyond the initial state. These phenomena indicate theexistence of easy-to-transfer ions in the oxide semiconductor layer. Itcan be considered that an ion which is transferred most easily is an ionof hydrogen that is the smallest atom.

Note that in a bottom-gate transistor, when an oxide semiconductor layeris formed over a gate insulating layer and then heat treatment isperformed thereon, not only water or hydrogen contained in the oxidesemiconductor layer but also water or hydrogen contained in the gateinsulating layer can be removed. Thus, in the gate insulating layer, thenumber of charge trapping centers is small. In this manner, the heattreatment for dehydration or dehydrogenation of the oxide semiconductorlayer has also an effect of reducing charge trapping centers in the gateinsulating layer. Therefore, in the bottom-gate transistor, the gateinsulating layer may be formed by a CVD method.

In addition, the oxide semiconductor layer is irradiated with lighthaving optical energy of a predetermined amount or more, whereby a bondof a metal element (M) and a hydrogen atom (H) (also referred to as anM—H bond) in the oxide semiconductor layer can be cut. Note that theoptical energy having a wavelength of about 400 nm is equal to orsubstantially equal to the bond energy of a metal element and a hydrogenatom. When a negative gate bias is applied to a transistor in which thebond of a metal element and a hydrogen atom in the oxide semiconductorlayer is cut, a hydrogen ion eliminated from the metal element isattracted to the gate electrode side, so that distribution of electricalcharge is changed, the threshold voltage of the transistor is shifted tothe negative side, and the transistor tends to be normally on.

Note that the hydrogen ions transferred to the interface of the gateinsulating layer by light irradiation and application of the negativegate bias to the transistor are returned to the initial state bystopping application of the voltage. This is a typical example of theion transfer in the oxide semiconductor layer.

In order to reduce such a change of the electrical characteristics byvoltage application (BT deterioration) or a change of the electricalcharacteristics by light irradiation (light deterioration), it is themost effective to remove a hydrogen atom or an impurity containing ahydrogen atom such as water thoroughly from the oxide semiconductorlayer to highly purify the oxide semiconductor layer.

The charge density in the oxide semiconductor layer as low as 10¹⁵ cm⁻³,or the charge per unit area as low as 10¹⁰ cm⁻² does not affect thetransistor characteristics or affects them very slightly. Therefore, itis preferable that the charge density be lower than or equal to 10¹⁵cm⁻³.

When 10% of hydrogen contained in the oxide semiconductor layer istransferred within the oxide semiconductor layer, it is preferable thatthe hydrogen concentration be lower than or equal to 10¹⁶ cm⁻³. Further,in order to prevent entry of hydrogen from the outside after a device iscompleted, it is preferable that a silicon nitride film formed by asputtering method be used as a passivation film to cover the transistor.

In order to solve such problems, one embodiment of the present inventionrelates to a method for sufficiently reducing impurities typified byhydrogen and moisture in an oxide semiconductor layer.

FIGS. 2A to 2C illustrate an example of a method for manufacturing thetransistor 410.

First, a conductive film is formed over the substrate 400 having aninsulating surface, and then, the gate electrode layer 401 is formedthrough a first photolithography step and an etching step.

Note that a resist mask used in the photolithography step may be formedby an inkjet method. Formation of the resist mask by an inkjet methodneeds no photomask; thus, manufacturing cost can be reduced.

Here, a substrate having heat resistance enough to withstand at leastheat treatment performed later can be used for the substrate 400. Forexample, a glass substrate made of barium borosilicate glass,aluminoborosilicate glass, or the like, a ceramic substrate, a quartzsubstrate, or a sapphire substrate may be used. A single crystalsemiconductor substrate or a polycrystalline semiconductor substratemade of silicon, silicon carbide, or the like; a compound semiconductorsubstrate made of silicon germanium or the like; an SOI substrate; orthe like may be used as the substrate 400.

Further, a flexible substrate may be used as the substrate 400. In thecase where a flexible substrate is used, the following methods can begiven, and either of them may be used: a method in which a transistorincluding an oxide semiconductor layer is directly formed over aflexible substrate; and a method in which a transistor including anoxide semiconductor layer is formed over another substrate and istransferred to a flexible substrate. In the case where the method inwhich the transistor is transferred to a flexible substrate is employed,the substrate over which the transistor is formed may be provided with aseparation layer.

An insulating film serving as a base film may be provided between thesubstrate 400 and the gate electrode layer 401. The base film preventsdiffusion of an impurity element from the substrate 400, and can beformed using a silicon nitride film, a silicon oxide film, a siliconnitride oxide film, or a silicon oxynitride film. The structure of thebase film is not limited to a single-layer structure, and may be alayered structure of a plurality of the above films.

The gate electrode layer 401 can be formed using a metal material suchas molybdenum, titanium, tantalum, tungsten, aluminum, copper,neodymium, or scandium, or an alloy material which includes any of thesemetal materials as a main component by a sputtering method or the like.The structure of the gate electrode layer 401 is not limited to asingle-layer structure, and may be a layered structure of a plurality ofthe above materials.

Next, the gate insulating layer 402 is formed over the gate electrodelayer 401. The gate insulating layer 402 can be formed using any ofsilicon oxide, silicon nitride, silicon oxynitride, silicon nitrideoxide, aluminum oxide, aluminum nitride, aluminum oxynitride, aluminumnitride oxide, hafnium oxide, and gallium oxide, or a mixed materialthereof by a plasma CVD method, a sputtering method, or the like. Thestructure of the gate insulating layer 402 is not limited to asingle-layer structure, and may be a layered structure of a plurality ofthe above materials.

It is preferable that an insulating material containing the same kind ofcomponent as the oxide semiconductor layer formed later be used for thegate insulating layer 402. Such a material enables the state of theinterface with the oxide semiconductor layer to be kept well. Here,containing “the same kind of component as the oxide semiconductor layer”means containing one or more elements selected from constituent elementsof the oxide semiconductor layer. For example, in the case where theoxide semiconductor layer is formed using an In—Ga—Zn-based oxidesemiconductor material, gallium oxide or the like is given as such aninsulating material containing the same kind of component as the oxidesemiconductor layer.

For the formation of the gate insulating layer 402, a high-densityplasma CVD method using microwaves (e.g., with a frequency of 2.45 GHz)is preferably employed because a high-quality insulating layer which isdense and has high breakdown voltage can be formed. The oxidesemiconductor layer is formed in close contact with the high-qualitygate insulating layer, whereby the interface state density can bereduced.

Moreover, it is possible to use as the gate insulating layer aninsulating layer whose quality and characteristics of the interface withthe oxide semiconductor layer are improved by heat treatment performedafter the formation of the insulating layer. In any case, the gateinsulating layer is preferably formed using an insulating layer that canreduce the interface state density with the oxide semiconductor layer toform a favorable interface, as well as having favorable film quality.

In order that hydrogen, a hydroxyl group, and moisture are contained aslittle as possible in an oxide semiconductor film formed over the gateinsulating layer 402, vacuum heating is preferably performed on thesubstrate 400 over which layers up to and including the gate insulatinglayer 402 are formed, in a preheating chamber of a deposition apparatus,so that impurities such as hydrogen and moisture adsorbed to thesubstrate 400 are eliminated and removed. As an evacuation unit providedfor the preheating chamber, a cryopump is preferably used. Similarly,this preheating may be performed on the substrate 400 over which layersup to and including the source electrode layer 405 a and the drainelectrode layer 405 b are formed, before the formation of the insulatinglayer 407. Note that this preheating treatment may be omitted.

Next, over the gate insulating layer 402, an oxide semiconductor filmwith a thickness of larger than or equal to 2 nm and smaller than orequal to 200 nm, preferably larger than or equal to 5 nm and smallerthan or equal to 30 nm is formed.

The oxide semiconductor layer includes at least one element selectedfrom In, Ga, Sn, and Zn. For example, a four-component metal oxide suchas an In—Sn—Ga—Zn—O-based oxide semiconductor, a three-component metaloxide such as an In—Ga—Zn—O-based oxide semiconductor, anIn—Sn—Zn—O-based oxide semiconductor, an In—Al—Zn—O-based oxidesemiconductor, a Sn—Ga—Zn—O-based oxide semiconductor, anAl—Ga—Zn—O-based oxide semiconductor, or a Sn—Al—Zn—O-based oxidesemiconductor, a two-component metal oxide such as an In—Zn—O-basedoxide semiconductor, a Sn—Zn—O-based oxide semiconductor, anAl—Zn—O-based oxide semiconductor, a Zn—Mg—O-based oxide semiconductor,a Sn—Mg—O-based oxide semiconductor, an In—Mg—O-based oxidesemiconductor, or an In—Ga—O-based oxide semiconductor, asingle-component metal oxide such as an In—O-based oxide semiconductor,a Sn—O-based oxide semiconductor, or a Zn—O-based oxide semiconductor,or the like can be used. In addition, any of the above oxidesemiconductors may contain an element other than In, Ga, Sn, and Zn, forexample, SiO₂. Here, an In—Ga—Zn—O-based oxide semiconductor means anoxide containing indium (In), gallium (Ga), and zinc (Zn), and there isno particular limitation on the composition ratio thereof. Further, theIn—Ga—Zn—O-based oxide semiconductor may contain an element other thanIn, Ga, and Zn.

For the oxide semiconductor film, a thin film represented by thechemical formula, InMO₃(ZnO)_(m) (m>0) can be used. Here, M representsone or more metal elements selected from Zn, Ga, Al, Mn, and Co.Specifically, M may be Ga, Ga and Al, Ga and Mn, Ga and Co, or the like.

In particular, when an oxide semiconductor containing indium, an oxidesemiconductor containing indium and gallium, or the like is used, atransistor having favorable electrical characteristics can be formed. Inthis embodiment, an In—Ga—Zn—O film is formed as the oxide semiconductorfilm by a sputtering method.

As the target used for a sputtering method, an oxide target having acomposition ratio of In₂O₃:Ga₂O₃:ZnO=1:1:1 [molar ratio] is used.Alternatively, an oxide target having a composition ratio of In₂O₃:Ga₂O₃:ZnO=1:1:2 [molar ratio] may be used.

In the case where an In—Zn—O-based material is used as an oxidesemiconductor, a target to be used has a composition ratio of In:Zn=50:1to 1:2 in an atomic ratio (In₂O₃:ZnO=25:1 to 1:4 in a molar ratio),preferably In:Zn=20:1 to 1:1 in an atomic ratio (In₂O₃:ZnO=10:1 to 1:2in a molar ratio), more preferably In:Zn=1.5:1 to 15:1 in an atomicratio (In₂O₃:ZnO=3:4 to 15:2 in a molar ratio). For example, when atarget used for forming an In—Zn—O-based oxide semiconductor has anatomic ratio of In:Zn:O=X:Y:Z, the relation of Z>(1.5X+Y) is satisfied.

The filling rate of the target is higher than or equal to 90% and lowerthan or equal to 100%, preferably higher than or equal to 95% and lowerthan or equal to 100%. With the use of the target with high fillingrate, a dense oxide semiconductor film can be formed.

As the sputtering gas, a rare gas (typically, argon), oxygen, or a mixedgas of a rare gas and oxygen can be used. It is preferable to use ahigh-purity gas from which impurities such as hydrogen, water, ahydroxyl group, and hydride are removed as the sputtering gas.

The oxide semiconductor film is preferably formed in the state where thesubstrate is heated. The substrate is held in a deposition chamber keptunder reduced pressure, and deposition is performed in the state wherethe substrate temperature is set to a temperature higher than or equalto 100° C. and lower than or equal to 600° C., preferably higher than orequal to 200° C. and lower than or equal to 400° C.; thus, the impurityconcentration in the oxide semiconductor film can be reduced.

In order to remove moisture remaining in the deposition chamber, anentrapment vacuum pump such as a cryopump, an ion pump, or a titaniumsublimation pump is preferably used. As an evacuation unit, a turbomolecular pump provided with a cold trap may be used. In the depositionchamber which is evacuated with a cryopump, a hydrogen atom, a compoundcontaining a hydrogen atom such as water, a compound containing a carbonatom, and the like are evacuated, whereby the impurity concentration inthe oxide semiconductor film formed in the deposition chamber can bereduced.

As one example of the film formation condition, the following is given:the distance between the substrate and the target is 100 mm, thepressure is 0.6 Pa, the direct-current (DC) power is 0.5 kW, and theatmosphere is an oxygen atmosphere (the proportion of the oxygen flow is100%). When a pulsed direct-current power source is used, powdersubstances (also referred to as particles or dust) that are generated indeposition can be reduced and the film thickness can be uniform.

Then, the oxide semiconductor film is processed into an island-shapedoxide semiconductor layer 441 through a second photolithography step andan etching step (see FIG. 2A).

Here, the etching of the oxide semiconductor film may be either dryetching or wet etching. Alternatively, both of them may be used. As anetchant used for wet etching of the oxide semiconductor film, forexample, a mixed solution of phosphoric acid, acetic acid, and nitricacid, or the like can be used. Alternatively, ITO-07N (produced by KANTOCHEMICAL CO., INC.) may be used.

Next, dehydration or dehydrogenation of the oxide semiconductor layer441 is performed through heat treatment. In this specification, the term“dehydration or dehydrogenation” refers to not only elimination of wateror a hydrogen molecule but also elimination of a hydrogen atom, ahydroxyl group, or the like.

Through this heat treatment, excessive hydrogen (including water and ahydroxyl group) is removed and a structure of the oxide semiconductorlayer is improved, so that an impurity level in energy gap can bereduced. The temperature of the heat treatment is higher than or equalto 250° C. and lower than or equal to 650° C., preferably higher than orequal to 350° C. and lower than or equal to 500° C., more preferablyhigher than or equal to 390° C. and lower than or equal to 460° C. Thelength of time of the heat treatment may be about 1 hour as long as thetemperature is in the above favorable range. Note that the temperatureand the length of time of the heat treatment may be determined asappropriate by a practitioner; for example, the heat treatment may beperformed at low temperature for a long time, or at high temperature fora short time.

Here, one example of an electric furnace that can be used for the heattreatment of the oxide semiconductor layer 441 in this embodiment isdescribed.

FIG. 4 is a schematic view of an electric furnace 701. Heaters 703 areprovided outside a chamber 702. Inside the chamber 702, a susceptor 705in which a substrate 704 is set is provided. In addition, the chamber702 is connected to a gas supply means 706 and an evacuation means 707.The temperature in the electric furnace 701 preferably increases athigher than or equal to 0.1° C./min and lower than or equal to 20°C./min and decreases at higher than or equal to 0.1° C./min and lowerthan or equal to 15° C./min.

The gas supply means 706 includes a gas supply source 711, a pressureadjusting valve 712, a refining apparatus 713, a mass flow controller714, and a stop valve 715. In this embodiment, the refining apparatus713 is provided between the gas supply source 711 and the chamber 702.The refining apparatus 713 can remove impurities such as water andhydrogen in a gas which is introduced into the chamber 702.

In addition to the electric furnace, an apparatus for heating an objectto be processed by heat conduction or heat radiation from a heater suchas a resistance heater may be used as a heat treatment apparatus. Forexample, a rapid thermal annealing (RTA) apparatus such as a gas rapidthermal annealing (GRTA) apparatus or a lamp rapid thermal annealing(LRTA) apparatus can be used. An LRTA apparatus is an apparatus forheating an object by radiation of light (an electromagnetic wave)emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenonarc lamp, a carbon arc lamp, a high-pressure sodium lamp, or ahigh-pressure mercury lamp. A GRTA apparatus is an apparatus forperforming heat treatment using a high-temperature gas.

In one embodiment of the present invention, nitrogen, dry air, oxygen,or the like is used as a gas for an atmosphere of the heat treatment. Inthe case where oxygen is used, there is no need to use only oxygen; forexample, a gas mixed with an inert gas such as nitrogen or a rare gasmay be used. In one embodiment of the present invention, heat treatmentin the above gas atmosphere and heat treatment under reduced pressureare sequentially performed, whereby dehydration or dehydrogenation ofthe oxide semiconductor layer is thoroughly performed; thus, the highlypurified oxide semiconductor layer is formed.

Note that it is preferable that water, hydrogen, and the like be notcontained in the gas for the atmosphere of the heat treatment. Forexample, the purity of the gas is 6N (99.9999%) or more, preferably 7N(99.99999%) or more. The dew point of the gas is lower than or equal to−50° C., preferably lower than or equal to −70° C., more preferablylower than or equal to −80° C. With such a high-purity gas, hydrogen andmoisture can be prevented from entering the oxide semiconductor layer asmuch as possible.

As specific examples of the heat treatment, a first method and a secondmethod will be described below.

In the first method, the temperature of the oxide semiconductor layer isincreased to the above temperature in a nitrogen atmosphere, a dry airatmosphere, or an oxygen atmosphere. Then, heat treatment is performedin an oxygen atmosphere. After that, the chamber in which the atmospheregas is included is evacuated to a vacuum, and heat treatment isperformed under reduced pressure; thus, dehydration or dehydrogenationof the oxide semiconductor layer is thoroughly performed. At this time,the heat treatment is preferably performed in a high-vacuum statewithout introducing an atmosphere gas. Then, the atmosphere is changedto an oxygen atmosphere again, and slow cooling is performed. Note thatthe “reduced pressure” is lower than normal pressure, and the“high-vacuum state” is 1×10⁻³ Pa or lower, preferably 1×10⁻⁴ Pa orlower, more preferably 1×10⁻⁵ Pa or lower.

The control of the atmosphere in increasing the temperature is performedin order to prevent hydrogen and moisture from entering the oxidesemiconductor layer as much as possible.

The reason why an oxygen atmosphere is used for the heat treatmentperformed just after the temperature is increased is that dehydration ordehydrogenation of the oxide semiconductor layer is promoted and inaddition, oxygen deficiency in the oxide semiconductor layer iscompensated and the oxide semiconductor layer is brought into anoxygen-excess state so that the proportion of oxygen is higher than thestoichiometric composition proportion. The oxide semiconductor layer isbrought into an oxygen-excessive state, whereby oxygen deficiency can besufficiently compensated.

The following heat treatment is performed under reduced pressure tofurther promote dehydration or dehydrogenation of the oxidesemiconductor layer.

The slow cooling following that is performed in an oxygen atmosphere inorder not to generate oxygen deficiency in the oxide semiconductor layerin decreasing the temperature.

Alternatively, the second method in which the atmospheres in the heattreatments are switched to each other may be employed. In the secondmethod, the temperature of the oxide semiconductor layer is increased tothe above temperature in a nitrogen atmosphere, a dry air atmosphere, oran oxygen atmosphere as in the first method. Then, the chamber in whichthe atmosphere gas is included is evacuated to a vacuum, and heattreatment is performed under reduced pressure. After that, heattreatment is performed in an oxygen atmosphere, and slow cooling isperformed without changing the atmosphere.

The reasons why the atmospheres are controlled in increasing thetemperature and performing the slow cooling in the second method aresimilar to those in the first method.

The reason why, just after the temperature is increased, the heattreatment is performed under reduced pressure is that dehydration ordehydrogenation of the oxide semiconductor layer is thoroughly promoted.

The heat treatment following that is performed in an oxygen atmospherein order to compensate oxygen deficiency which is generated at the sametime as the thorough dehydration or dehydrogenation under reducedpressure.

The heat treatment is performed by the first method or the secondmethod, whereby dehydration or dehydrogenation of the oxidesemiconductor layer can be thoroughly performed, and in addition, oxygendeficiency in the oxide semiconductor layer can be efficientlycompensated. The oxide semiconductor layer is highly purified in such amanner, so that the oxide semiconductor layer 403 in which the number ofcarriers is extremely small and which can be called a substantiallyintrinsic semiconductor can be formed (see FIG. 2B).

Here, gas discharge characteristics of the oxide semiconductor film(In—Ga—Zn—O film) which has been subjected to the heat treatment underreduced pressure are shown in FIG. 12 with the use of thermal desorptionspectroscopy (TDS). H₂O, H, and OH are detected as detection objects,and a sample which is formed in such a manner that an oxidesemiconductor film is subjected to heat treatment at 450° C. for 1 hourunder reduced pressure (2×10⁻¹ Pa) is compared with a sample which isformed in such a manner that the oxide semiconductor film is justformed.

As for the sample which is formed in such a manner that the oxidesemiconductor film is just formed, any gas component has a peak ataround 290° C. This peak is due to moisture contained in the film, orrelease of H or OH which has been bound to metal in the film. On theother hand, as for the sample which has been subjected to the heattreatment under reduced pressure, any gas component does not have a peakof release. These indicate that, through the heat treatment underreduced pressure, impurities such as H₂O, H, and OH have been released,and a highly purified oxide semiconductor film is formed.

Note that in the above first method or second method, heat treatment ina reduced-pressure state and heat treatment in an oxygen atmosphere maybe repeated a plurality of times. By repeatedly performing the heattreatments, dehydration or dehydrogenation of the oxide semiconductorlayer can be further promoted.

The temperature may be increased and the heat treatment may be performedin the state where the oxide semiconductor layer is irradiated withlight having a short wavelength. By irradiation of the oxidesemiconductor layer with light having a short wavelength, a bond of ametal component and a hydrogen atom or a hydroxyl group in the oxidesemiconductor layer is easily cut; thus, dehydration or dehydrogenationcan be performed easily. Specifically, the oxide semiconductor layer ispreferably irradiated with light having a wavelength longer than orequal to 350 nm and shorter than or equal to 450 nm.

The heat treatment performed on the oxide semiconductor may be performedon the oxide semiconductor film which has not yet been processed intothe island-shaped oxide semiconductor layer. In that case, after theheat treatment, a photolithography step is performed. The heat treatmentmay be performed after the source electrode layer and the drainelectrode layer are formed over the island-shaped oxide semiconductorlayer as long as the oxide semiconductor is deposited.

Oxygen doping treatment may be performed on the oxide semiconductorlayer after the slow cooling. Through the oxygen doping treatment,oxygen deficiency in the oxide semiconductor layer can be compensatedand the oxide semiconductor layer can be brought into an oxygen-excessstate.

The oxygen doping treatment is addition of an oxygen radical, an oxygenatom, or an oxygen ion to a surface and the bulk of the oxidesemiconductor layer. In particular, addition of an oxygen radical, anoxygen atom, or an oxygen ion to the surface and the bulk of the oxidesemiconductor layer, with oxygen plasma is also called oxygen plasmadoping treatment. The substrate over which the oxide semiconductor layeris formed is preferably biased.

An oxygen radial, an oxygen atom, and/or an oxygen ion with which theoxide semiconductor layer is doped can be generated with the use of agas containing oxygen in a plasma generating apparatus. For example, adry etching apparatus or the like can be used. Alternatively, an ozonegenerating apparatus may be used.

The oxygen doping treatment on the oxide semiconductor layer can beperformed before the oxide semiconductor film is processed into theisland-shaped oxide semiconductor layer as long as the heat treatment isperformed before that oxygen doping treatment. Alternatively, the oxygendoping treatment may be performed after the source electrode layer andthe drain electrode layer are formed over the island-shaped oxidesemiconductor layer.

Next, a conductive film to be the source electrode layer and the drainelectrode layer (including a wiring formed from the same layer as thesource electrode layer and the drain electrode layer) is formed over thegate insulating layer 402 and the oxide semiconductor layer 403. As theconductive film serving as the source electrode layer and the drainelectrode layer, for example, a metal film containing an elementselected from aluminum, chromium, copper, tantalum, titanium,molybdenum, or tungsten, or a metal nitride film containing any of theabove elements as its component (e.g., a titanium nitride film, amolybdenum nitride film, or a tungsten nitride film) can be used.Alternatively, a film of a high-melting-point metal such as titanium,molybdenum, or tungsten or a nitride film of any of them (e.g., atitanium nitride film, a molybdenum nitride film, or a tungsten nitridefilm) may be provided on one surface or both surfaces of a metal filmsuch as an aluminum film or a copper film to form the conductive filmserving as the source electrode layer and the drain electrode layer.

Alternatively, the conductive film serving as the source electrode layerand the drain electrode layer may be formed using a conductive metaloxide. As the conductive metal oxide, indium oxide (In₂O₃), tin oxide(SnO₂), zinc oxide (ZnO), an indium oxide-tin oxide alloy (In₂O₃—SnO₂;abbreviated to ITO), an indium oxide-zinc oxide alloy (In₂O₃—ZnO), orany of these metal oxide materials in which silicon oxide is containedcan be used.

Next, a resist mask is formed over the conductive film in a thirdphotolithography step and selective etching is performed, so that thesource electrode layer 405 a and the drain electrode layer 405 b areformed. Then, the resist mask is removed.

Note that the etching of the conductive film is performed so that theoxide semiconductor layer 403 is not etched as much as possible.However, it is difficult to obtain etching conditions under which onlythe conductive film is etched. In some cases, the oxide semiconductorlayer 403 is partly etched so as to have a groove portion (a recessedportion) by the etching of the conductive film.

In this embodiment, a titanium film is used as the conductive film andan In—Ga—Zn—O-based oxide semiconductor is used as the oxidesemiconductor layer 403, and therefore, ammonium hydrogen peroxide (amixture of ammonia, water, and hydrogen peroxide) is used as an etchant.By use of ammonia hydrogen peroxide as an etchant, the conductive filmcan be selectively etched.

Through the above process, the transistor 410 is formed (see FIG. 2C).The transistor 410 is a transistor including the oxide semiconductorlayer 403 which is highly purified and from which impurities such ashydrogen, moisture, a hydroxyl group, and hydride (also referred to as ahydrogen compound) are intentionally removed. Therefore, variation inelectrical characteristics of the transistor 410 is suppressed and thetransistor 410 is electrically stable.

Further, as illustrated in FIG. 3A, a transistor 440 in which theinsulating layer 407 and an insulating layer 409 are provided over theoxide semiconductor layer 403, the source electrode layer 405 a, and thedrain electrode layer 405 b can be formed.

The insulating layer 407 can be formed with a thickness of at least 1 nmusing the above method by which impurities such as water and hydrogenare not mixed into the insulating layer as much as possible, asappropriate. In this embodiment, the insulating layer 407 is formed by asputtering method. When hydrogen is contained in the insulating layer407, hydrogen might enter the oxide semiconductor layer 403 or oxygenmight be extracted from the oxide semiconductor layer 403 by hydrogen.If such a phenomenon is caused, the resistance of the oxidesemiconductor layer 403 on the backchannel side might be decreased (theoxide semiconductor layer 403 on the backchannel side might have n-typeconductivity) and a parasitic channel might be formed. Therefore, it isimportant that the insulating layer 407 contain as little hydrogen aspossible.

As the insulating layer 407, an inorganic insulating film such as asilicon oxide film, a silicon oxynitride film, an aluminum oxide film,an aluminum oxynitride film, or a gallium oxide film can be typicallyused. In this embodiment, a 200-nm-thick gallium oxide film is formed asthe insulating layer 407 by a sputtering method.

It is preferable that an insulating material containing the same kind ofcomponent as the oxide semiconductor layer 403 be used for theinsulating layer 407, like the gate insulating layer 402. Such amaterial enables the state of the interface with the oxide semiconductorlayer to be kept well. For example, in the case where the oxidesemiconductor layer is formed using an In—Ga—Zn-based oxidesemiconductor material, gallium oxide or the like is given as such aninsulating material containing the same kind of component as the oxidesemiconductor layer.

In the case where the insulating layer 407 has a layered structure, itis further preferable to employ a layered structure of an insulatingfilm containing the same kind of component as the oxide semiconductorlayer (hereinafter referred to as a film a) and a film containing amaterial different from the component material of the film a(hereinafter referred to as a film b). The reason is as follows. Whenthe insulating layer 407 has such a structure in which the film a andthe film b are sequentially stacked from the oxide semiconductor layerside, charge is trapped preferentially in a charge trapping center atthe interface between the film a and the film b (compared with theinterface between the oxide semiconductor layer and the film a). Thus,trapping of charge at the interface with the oxide semiconductor layercan be sufficiently suppressed, resulting in higher reliability of thesemiconductor device.

For example, a layered structure in which a gallium oxide film and asilicon oxide film are stacked from the oxide semiconductor layer 403side, or a layered structure in which a gallium oxide film and a siliconnitride film are stacked from the oxide semiconductor layer 403 side ispreferably used as the insulating layer 407.

In this embodiment, a silicon oxide film is used as the insulating layer407. The silicon oxide film can be formed by a sputtering method using arare gas, oxygen, or a mixed gas of a rare gas and oxygen. The substratetemperature in film formation may be higher than or equal to roomtemperature and lower than or equal to 300° C. and in this embodiment,is 100° C. Further, a silicon oxide target or a silicon target can beused as a target. For example, the silicon oxide film can be formed withthe use of a silicon target and oxygen as a sputtering gas.

In order to remove moisture remaining in the deposition chamber information of the insulating layer 407 in a manner similar to that of theformation of the oxide semiconductor film, an entrapment vacuum pump(such as a cryopump) is preferably used. From a deposition chamberevacuated with the use of the cryopump, a hydrogen atom, a compoundcontaining a hydrogen atom such as water, a compound containing a carbonatom, or the like is evacuated; therefore, the impurity concentration inthe formed insulating layer 407 can be reduced. In addition, as anevacuation unit for removing moisture remaining in the depositionchamber, a turbo molecular pump provided with a cold trap may be used.

It is preferable that a high-purity gas from which impurities such ashydrogen, water, a hydroxyl group, and hydride are removed be used as asputtering gas when the insulating layer 407 is formed.

Heat treatment may be performed after the formation of the insulatinglayer 407. The method and atmosphere of the heat treatment can besimilar to those of the above heat treatment for dehydration ordehydrogenation of the oxide semiconductor layer 441.

In the case where the insulating layer 407 contains oxygen and the heattreatment is performed in the state where the oxide semiconductor layer403 is in contact with the insulating layer 407, oxygen can be furthersupplied to the oxide semiconductor layer 403 from the insulating layer407 containing oxygen.

It is preferable to form the insulating layer 409 serving as aprotective insulating layer over the insulating layer 407, in order toprevent impurities such as moisture and hydrogen from entering the oxidesemiconductor layer 403 and to prevent discharge of oxygen from the gateinsulating layer 402, the oxide semiconductor layer 403, the insulatinglayer 407, and the interfaces thereof. For the insulating layer 409, aninorganic insulating film such as a silicon nitride film or an aluminumoxide film can be used. For example, a silicon nitride film is formed byan RF sputtering method.

Heat treatment may be performed after the insulating layer 409 isformed. For example, the heat treatment can be performed at atemperature higher than or equal to 100° C. and lower than or equal to200° C. in air for longer than or equal to 1 hour and shorter than orequal to 30 hours. This heat treatment may be performed at a fixedtemperature once. Alternatively, the following change in temperature maybe conducted plural times: the temperature is increased from roomtemperature to a temperature higher than or equal to 100° C. and lowerthan or equal to 200° C. and then decreased to room temperature.

In the case where the gate insulating layer 402 has a layered structure,it is preferable to employ a layered structure of an insulating filmcontaining the same kind of component as the oxide semiconductor layer(hereinafter referred to as a film a) and a film containing a materialdifferent from the component material of the film a (hereinafterreferred to as a film b). The reason is as follows. When the gateinsulating layer 402 has such a structure in which the film a and thefilm b are sequentially stacked from the oxide semiconductor layer side,charge is trapped preferentially in a charge trapping center at theinterface between the film a and the film b (compared with the interfacebetween the oxide semiconductor layer and the film a). Thus, trapping ofcharge at the interface with the oxide semiconductor layer can besufficiently suppressed, resulting in higher reliability of thesemiconductor device.

A transistor 460 in which a gate insulating layer has a layeredstructure is shown in FIG. 3B. In the transistor 460, a first gateinsulating layer 402 a and a second gate insulating layer 402 b arestacked over the gate electrode layer 401, and the oxide semiconductorlayer 403 is formed over the second gate insulating layer 402 b. Thesecond gate insulating layer 402 b in contact with the oxidesemiconductor layer 403 is an insulating film (film a) containing thesame kind of component as the oxide semiconductor layer 403, and thefirst gate insulating layer 402 a below the second gate insulating layer402 b is a film (film b) containing a material different from thecomponent material of the second gate insulating layer 402 b.

For example, in the case where an In—Ga—Zn-based oxide semiconductorfilm is used as the oxide semiconductor layer 403, a gallium oxide filmcan be used as the second gate insulating layer 402 b, and a siliconoxide film can be used as the first gate insulating layer 402 a. Aninsulating film containing the same kind of component as the oxidesemiconductor layer 403 is also preferably used as the insulating layer407 formed on and in contact with the oxide semiconductor layer 403.

Other structures of transistors each including the oxide semiconductorlayer 403 which is formed by the above method are illustrated in FIGS.3C and 3D.

A transistor 420 in FIG. 3C is a kind of bottom-gate transistor, whichis called a channel protective transistor. Further, it is also called aninverted staggered transistor.

The transistor 420 includes, over the substrate 400 having an insulatingsurface, the gate electrode layer 401, the gate insulating layer 402,the oxide semiconductor layer 403, an insulating layer 427 serving as achannel protective layer covering a channel formation region of theoxide semiconductor layer 403, the source electrode layer 405 a, and thedrain electrode layer 405 b. The insulating layer 409 is formed so as tocover the transistor 420.

A transistor 430 illustrated in FIG. 3D is a kind of bottom-gatestructure, which is called a bottom contact transistor.

The transistor 430 includes, over the substrate 400 having an insulatingsurface, the gate electrode layer 401, the gate insulating layer 402,the source electrode layer 405 a, the drain electrode layer 405 b, andthe oxide semiconductor layer 403. The insulating layer 407 which coversthe transistor 430 and is in contact with the oxide semiconductor layer403 is provided. The insulating layer 409 is provided over theinsulating layer 407.

Note that the method for manufacturing the transistor in this embodimentcan be applied to a transistor having a top-gate structure.

In the transistors 410, 420, 430, 440, and 460 each including the highlypurified oxide semiconductor layer 403, which are manufactured accordingto this embodiment, the current value in an off state (off currentvalue) thereof can be low. These transistors have high reliability; forexample, the amount of change in threshold voltage of each of thetransistors between before and after light irradiation and thebias-temperature stress (BT) test is reduced.

Further, in the transistors 410, 420, 430, 440, and 460 each includingthe oxide semiconductor layer 403, relatively high field-effect mobilitycan be obtained, which enables high-speed operation. Consequently, withthe above transistor provided in a pixel portion of a semiconductordevice having a display function, high-quality images can be displayed.In addition, by using the transistor including the highly purified oxidesemiconductor layer, a driver circuit portion and a pixel portion can beformed over one substrate, whereby the number of components of thesemiconductor device can be reduced.

As described above, a transistor including an oxide semiconductor, whichhas stable electrical characteristics, can be formed, whereby a highlyreliable semiconductor device can be provided.

Note that this embodiment can be implemented in combination with any ofthe other embodiments as appropriate.

Embodiment 2

A semiconductor device having a display function (also referred to as adisplay device) can be manufactured using the transistor described inEmbodiment 1. Further, part or the whole of the driver circuit whichincludes transistors can be formed over the same substrate as the pixelportion, whereby a system-on-panel can be obtained.

FIGS. 5A to 5C illustrate examples of a display device in thisembodiment. In a display device of FIG. 5A, a pixel portion 4002provided over a first substrate 4001 is sealed by the first substrate4001, a sealant 4005 which is provided so as to surround the pixelportion, and a second substrate 4006. Further, a scan line drivercircuit 4004 and a signal line driver circuit 4003 which are formedusing a single crystal semiconductor or a polycrystalline semiconductorare mounted in a region different from the region surrounded by thesealant 4005 over the first substrate 4001. Various signals andpotentials are supplied to the signal line driver circuit 4003 and thescan line driver circuit 4004 through flexible printed circuits (FPCs)4018 a and 4018 b.

In display devices of FIGS. 5B and 5C, the sealant 4005 is provided soas to surround the pixel portion 4002 and the scan line driver circuit4004 which are provided over the first substrate 4001. The secondsubstrate 4006 is provided over the pixel portion 4002 and the scan linedriver circuit 4004. Consequently, the pixel portion 4002 and the scanline driver circuit 4004 are sealed together with the display element,in a region surrounded by the first substrate 4001, the second substrate4006, and the sealant. Further, the signal line driver circuit 4003which is formed using a single crystal semiconductor or apolycrystalline semiconductor is mounted in a region different from theregion surrounded by the sealant 4005 over the first substrate 4001.Here, a variety of signals and potentials are supplied to the signalline driver circuit 4003 which is formed separately, the scan linedriver circuit 4004, or the pixel portion 4002 through an FPC 4018.

Although FIGS. 5B and 5C each illustrate an example of a display devicein which only the signal line driver circuit 4003 is formed separatelyand mounted on the first substrate 4001, one embodiment of the presentinvention is not limited to this structure. The scan line driver circuitmay be separately formed and then mounted, or only part of the signalline driver circuit or part of the scan line driver circuit may beseparately formed and then mounted.

Note that a connection method of a separately formed driver circuit isnot particularly limited, and a chip on glass (COG) method, a wirebonding method, a tape automated bonding (TAB) method, or the like canbe used. FIGS. 5A and 5B each illustrate an example in which the drivercircuit is mounted by a COG method, and FIG. 5C illustrates an examplein which the driver circuit is mounted by a TAB method.

In addition, the display device may include a panel in which the displayelement is sealed, an IC including a controller on the panel, or thelike.

Note that a display device in this specification means an image displaydevice, a display device, or a light source (including a lightingdevice). Furthermore, the display device also includes the followingmodules in its category: a module to which an FPC or a TAB tape isattached; a module having a TAB tape at the tip of which a printedwiring board is provided; and a module in which an integrated circuit(IC) is directly mounted on a display element by a COG method.

The pixel portion and the scan line driver circuit provided over thefirst substrate can be formed with the use of the transistor describedin Embodiment 1.

As the display element provided in the display device, a liquid crystalelement (also referred to as a liquid crystal display element) or alight-emitting element (also referred to as a light-emitting displayelement) can be used. The light-emitting element includes, in itscategory, an element whose luminance is controlled by a current or avoltage, and specifically includes, in its category, an inorganicelectroluminescent (EL) element, an organic EL element, and the like.Further, a display medium whose contrast is changed by an electriceffect, such as electronic ink, can be used.

Specific examples of the semiconductor device are described withreference to FIG. 6, FIG. 7, and FIG. 8. FIG. 6, FIG. 7, and FIG. 8correspond to cross-sectional views taken along line M-N in FIG. 5B.

As illustrated in FIG. 6, FIG. 7, and FIG. 8, the semiconductor deviceincludes a connection terminal electrode 4015 and a terminal electrode4016. The connection terminal electrode 4015 and the terminal electrode4016 are electrically connected to a terminal included in the FPC 4018through an anisotropic conductive film 4019.

The connection terminal electrode 4015 is formed using the sameconductive film as a first electrode layer 4030, and the terminalelectrode 4016 is formed using the same conductive film as source anddrain electrode layers of transistors 4010 and 4011.

The pixel portion 4002 and the scan line driver circuit 4004 which areprovided over the first substrate 4001 include a plurality oftransistors. In FIG. 6, FIG. 7, and FIG. 8, the transistor 4010 includedin the pixel portion 4002 and the transistor 4011 included in the scanline driver circuit 4004 are illustrated as an example. Insulatinglayers 4020 and 4024 are provided over the transistor. In addition,there are regions in which an insulating layer 4021 is provided in thesemiconductor devices of FIG. 7 and FIG. 8. Note that an insulatinglayer 4023 is an insulating film serving as a base film.

In this embodiment, the transistor described in Embodiment 1 can beapplied to the transistor 4010 and the transistor 4011. Variation inelectrical characteristics of the transistor 4010 and the transistor4011 is suppressed and the transistor 4010 and the transistor 4011 areelectrically stable. Therefore, highly reliable semiconductor devicescan be provided as the semiconductor devices of this embodimentillustrated in FIG. 6, FIG. 7, and FIG. 8.

In addition, in this embodiment, a conductive layer is provided over theinsulating layer 4024 so as to overlap with a channel formation regionof the oxide semiconductor layer in the transistor 4011 for the drivercircuit. The potential of the conductive layer is the same as that of agate electrode of the transistor 4011, whereby the conductive layer canalso function as a second gate electrode. Needless to say, theconductive layer may be supplied with a different potential. Thepotential of the conductive layer may be GND, 0 V or the conductivelayer may be in a floating state. By providing the conductive layer soas to overlap with the channel formation region of the oxidesemiconductor layer, the amount of change in threshold voltage of thetransistor 4011 between before and after the BT test can be furtherreduced.

In addition, the conductive layer functions to block an externalelectric field, (particularly, to prevent static electricity). That is,the external electric field is prevented from adversely affecting theinside (a circuit portion including the transistor); thus, variation inelectrical characteristics of the transistor due to the influence of theexternal electric field such as static electricity can be prevented.

The transistor 4010 included in the pixel portion 4002 is electricallyconnected to a display element to drive the display element. A varietyof display elements can be used as the display element as long asdisplay can be performed.

An example of a liquid crystal display device using a liquid crystalelement as a display element is illustrated in FIG. 6. A liquid crystalelement 4013 includes the first electrode layer 4030, a second electrodelayer 4031, and a liquid crystal layer 4008. Insulating layers 4032 and4033 which serve as alignment films are formed so that the liquidcrystal layer 4008 is provided therebetween.

A columnar spacer 4035 is provided in order to control the thickness ofthe liquid crystal layer 4008 (a cell gap). The columnar spacer 4035 isobtained by selective etching of an insulating film. Note that thespacer is not limited to a columnar spacer, and, for example, aspherical spacer may be used.

In the case where a liquid crystal element is used as the displayelement, thermotropic liquid crystal, low-molecular liquid crystal,high-molecular liquid crystal, polymer dispersed liquid crystal,ferroelectric liquid crystal, anti-ferroelectric liquid crystal, or thelike can be used. These liquid crystal materials exhibit a cholestericphase, a smectic phase, a cubic phase, a chiral nematic phase, anisotropic phase, or the like depending on conditions.

Alternatively, liquid crystal exhibiting a blue phase for which analignment film is unnecessary may be used. A blue phase is one of liquidcrystal phases, which is generated just before a cholesteric phasechanges into an isotropic phase while temperature of cholesteric liquidcrystal is increased. Since the blue phase is only generated within anarrow range of temperatures, a liquid crystal composition containing achiral agent at 5 wt % or more is used for the liquid crystal layer inorder to improve the temperature range. The liquid crystal compositionwhich includes liquid crystal exhibiting a blue phase and a chiral agenthas a short response time of 1 msec or less, has optical isotropy, whichmakes the alignment process unneeded, and has a small viewing angledependence. In addition, since an alignment film does not need to beprovided and rubbing treatment is unnecessary, electrostatic dischargedamage caused by the rubbing treatment can be prevented and defects anddamage of the liquid crystal display device in the manufacturing processcan be reduced. Thus, liquid crystal display devices can be manufacturedwith improved productivity.

The specific resistivity of the liquid crystal material is 1×10⁹ Ω·cm ormore, preferably 1×10¹¹ Ω·cm or more, more preferably 1×10¹² Ω·cm ormore. The value of the specific resistivity in this specification ismeasured at 20° C.

The size of a storage capacitor formed in the liquid crystal displaydevice is set in consideration of the leakage current of the transistorprovided in the pixel portion or the like so that charge can be held fora predetermined period. By using the transistor including the highlypurified oxide semiconductor layer, it is enough to provide a storagecapacitor having a capacitance that is ⅓ or less, preferably ⅕ or lessof a liquid crystal capacitance of each pixel.

In the transistor used in this embodiment, which includes the highlypurified oxide semiconductor layer, the current value in an off state(off current value) can be made low. Accordingly, an electrical signalsuch as an image signal can be held for a long period, and a writinginterval can be set long in an on state. Accordingly, the frequency ofrefresh operation can be reduced, which leads to an effect ofsuppressing power consumption.

In this embodiment, the transistor including the highly purified oxidesemiconductor layer can have relatively high field-effect mobility andthus is capable of high-speed operation. Therefore, by using thetransistor in the pixel portion of the liquid crystal display device, ahigh-quality image can be displayed. In addition, since the transistorscan be provided in a driver circuit portion and a pixel portion over onesubstrate, the number of components of the liquid crystal display devicecan be reduced.

For the liquid crystal display device, a twisted nematic (TN) mode, anin-plane-switching (IPS) mode, a fringe field switching (FFS) mode, anaxially symmetric aligned micro-cell (ASM) mode, an optical compensatedbirefringence (OCB) mode, a ferroelectric liquid crystal (FLC) mode, anantiferroelectric liquid crystal (AFLC) mode, or the like can be used.

A normally black liquid crystal display device such as a transmissiveliquid crystal display device utilizing a vertical alignment (VA) modemay be used. The vertical alignment mode is a method for controllingalignment of liquid crystal molecules of a liquid crystal display panel,in which liquid crystal molecules are aligned vertically to a panelsurface when no voltage is applied. Some examples are given as thevertical alignment mode. For example, a multi-domain vertical alignment(MVA) mode, a patterned vertical alignment (PVA) mode, an ASV mode, orthe like can be used. Moreover, it is possible to use a method calleddomain multiplication or multi-domain design, in which a pixel isdivided into some regions (subpixels) and molecules are aligned indifferent directions in their respective regions.

The liquid crystal display device includes a black matrix (alight-blocking layer), an optical member (an optical substrate) such asa polarizing member, a retardation member, or an anti-reflection member,and the like. In addition, a backlight, a side light, or the like may beused as a light source.

In addition, it is possible to employ a time-division display method(also called a field-sequential driving method) with the use of aplurality of light-emitting diodes (LEDs) as a backlight. By employing afield-sequential driving method, color display can be performed withoutusing a color filter.

As a display method in the pixel portion, a progressive method, aninterlace method, or the like can be employed. Further, color elementscontrolled in a pixel at the time of color display are not limited tothree colors: R, G, and B (R, G, and B correspond to red, green, andblue, respectively). For example, R, G, B, and W (W corresponds towhite); R, G, B, and one or more of yellow, cyan, magenta, and the like;or the like can be used. Further, the sizes of display regions may bedifferent between respective dots of color elements. The presentinvention is not limited to the application to a display device forcolor display but can also be applied to a display device for monochromedisplay.

Alternatively, as the display element included in the display device, alight-emitting element utilizing electroluminescence can be used.Light-emitting elements utilizing electroluminescence are classifiedaccording to whether a light-emitting material is an organic compound oran inorganic compound. In general, the former is referred to as anorganic EL element, and the latter is referred to as an inorganic ELelement.

In an organic EL element, by application of voltage to a light-emittingelement, electrons and holes are separately injected from a pair ofelectrodes into a layer containing a light-emitting organic compound, sothat current flows. The carriers (electrons and holes) are recombined,and thus, the light-emitting organic compound is excited. Thelight-emitting organic compound returns to a ground state from theexcited state, thereby emitting light. An element which emits light withsuch a mechanism is called a current-excitation light-emitting element.

The inorganic EL elements are classified according to their elementstructures into a dispersion-type inorganic EL element and a thin-filminorganic EL element. A dispersion-type inorganic EL element has alight-emitting layer where particles of a light-emitting material aredispersed in a binder, and its light emission mechanism isdonor-acceptor recombination type light emission that utilizes a donorlevel and an acceptor level. A thin-film inorganic EL element has astructure where a light-emitting layer is sandwiched between dielectriclayers, which are further sandwiched between electrodes, and its lightemission mechanism is localized type light emission that utilizesinner-shell electron transition of metal ions. Note that an example ofan organic EL element as a light-emitting element is described here.

In order to extract light emitted from the light-emitting element, atleast one of a pair of electrodes is required to transmit light. Thetransistor and the light-emitting element are formed over the substrate.The light-emitting element can have a top emission structure in whichlight is extracted through the surface opposite to the substrate, abottom emission structure in which light is extracted through thesurface on the substrate side, or a dual emission structure in whichlight is extracted through the surface opposite to the substrate and thesurface on the substrate side. A light-emitting element having any ofthese emission structures can be used.

An example of a display device in which a light-emitting element is usedas a display element is illustrated in FIG. 7. A light-emitting element4513 is electrically connected to the transistor 4010 provided in thepixel portion 4002. The structure of the light-emitting element 4513 is,but not limited to, a layered structure of the first electrode layer4030, an electroluminescent layer 4511, and the second electrode layer4031. The structure of the light-emitting element 4513 can be changed asappropriate depending on a direction in which light is extracted fromthe light-emitting element 4513, or the like.

A partition wall 4510 can be formed using an organic insulating materialor an inorganic insulating material. It is preferable that the partitionwall 4510 be formed to have an opening over the first electrode layer4030 so that a sidewall is formed as an inclined surface with curvatureover the first electrode layer 4030. Such an opening can be easilyformed using a photosensitive resin material.

The electroluminescent layer 4511 can be formed with a single layer or astacked layer of a plurality of layers.

A protective film may be formed over the second electrode layer 4031 andthe partition wall 4510 in order to prevent entry of oxygen, hydrogen,moisture, carbon dioxide, and the like into the light-emitting element4513. As the protective film, a silicon nitride film, a silicon nitrideoxide film, a DLC film, or the like can be formed. In addition, in asealed space which is formed with the first substrate 4001, the secondsubstrate 4006, and the sealant 4005, a filler 4514 is provided. In thismanner, it is preferable that the light-emitting element be packaged(sealed) with a protective film (such as a laminate film or anultraviolet curable resin film) or a cover material with highair-tightness and little degasification.

As the filler 4514, an inert gas such as nitrogen or argon can be used.In addition, an ultraviolet curable resin or a thermosetting resin, suchas polyvinyl chloride (PVC), acrylic, polyimide, an epoxy resin, asilicone resin, polyvinyl butyral (PVB), or ethylene vinyl acetate(EVA), can be used.

If needed, an optical film such as a polarizing plate, a circularlypolarizing plate (including an elliptically polarizing plate), aretardation plate (a quarter-wave plate or a half-wave plate), or acolor filter may be provided as appropriate on a light-emitting surfaceof the light-emitting element. Furthermore, the polarizing plate or thecircularly polarizing plate may be provided with an anti-reflectionfilm. For example, anti-glare treatment by which reflected light can bediffused by projections and depressions on the surface so that the glareis reduced can be performed.

Further, an electronic paper in which electronic ink is driven may bemanufactured as the display device. The electronic paper is also calledan electrophoretic display device (electrophoretic display) and hasadvantages in that it has the same level of readability as regularpaper, it has less power consumption than other display devices, and itcan be set to have a thin and light form.

An electrophoretic display device has various modes. For example, theelectrophoretic display device contains a plurality of microcapsulesdispersed in a solvent or a solute, and each microcapsule contains firstparticles which are positively charged and second particles which arenegatively charged. By application of an electric field to themicrocapsules, the particles in the microcapsules move in oppositedirections to each other and only the color of the particles gatheringon one side is displayed. Note that the first particles and the secondparticles each contain pigment and do not move without an electricfield. Moreover, the first particles and the second particles havedifferent colors (one of which may be colorless).

A solution in which the above microcapsules are dispersed in a solventis referred to as electronic ink. This electronic ink can be printed ona surface of glass, plastic, cloth, paper, or the like. Furthermore, byusing a color filter or particles that have a pigment, color display canalso be achieved.

Note that the first particles and the second particles in themicrocapsules can each be formed of a single material selected from aconductive material, an insulating material, a semiconductor material, amagnetic material, a liquid crystal material, a ferroelectric material,an electroluminescent material, an electrochromic material, and amagnetophoretic material, or formed of a composite material of any ofthese.

As a structure of the electronic paper, a twisting ball display systemcan be used. The twisting ball display system refers to a method inwhich spherical particles each colored in black and white are arrangedbetween a first electrode layer and a second electrode layer of adisplay element, and a potential difference is generated between theelectrode layers to control orientation of the spherical particles, sothat display is performed.

FIG. 8 illustrates, as one example of a display device, an active matrixelectronic paper in which a twisting ball display system is employed.

Between the first electrode layer 4030 connected to the transistor 4010and the second electrode layer 4031 provided for the second substrate4006, spherical particles 4613 each of which includes a black region4615 a, a white region 4615 b, and a cavity 4612 which is filled withliquid, are provided. A space around the spherical particles 4613 isfilled with a filler 4614 such as a resin. The second electrode layer4031 corresponds to a common electrode (counter electrode). The secondelectrode layer 4031 is electrically connected to a common potentialline.

Note that in FIG. 6, FIG. 7, and FIG. 8, a flexible substrate as well asa glass substrate can be used as any of the first substrate 4001 and thesecond substrate 4006. For example, a plastic substrate having alight-transmitting property can be used. The plastic may be afiberglass-reinforced plastics (FRP) plate, a polyvinyl fluoride (PVF)film, a polyester film, or an acrylic film. In addition, a sheet with astructure in which an aluminum foil is sandwiched between PVF films orpolyester films can be used.

The insulating layer 4020 can be formed using a material including aninorganic insulating material, such as silicon oxide, siliconoxynitride, hafnium oxide, aluminum oxide, or gallium oxide. There is noparticular limitation on the method for forming the insulating layer4020, and for example, the insulating layer 4020 may be formed by adeposition method such as a plasma CVD method or a sputtering method. Asputtering method or the like is preferable in terms of low possibilityof entry of hydrogen, water, and the like.

The insulating layer 4024 serving as a protective film of thetransistors can be formed using a silicon nitride film, a siliconnitride oxide film, an aluminum oxide film, an aluminum nitride film, analuminum oxynitride film, or an aluminum nitride oxide film. Thestructure of the insulating layer 4024 is not limited to a single-layerstructure of the above film, and may be layered structure of differentfilms. The insulating layer 4024 is preferably formed by a sputteringmethod.

The insulating layer 4021 can be formed using an organic insulatingmaterial or an inorganic insulating material. Note that the insulatinglayer 4021 formed using a heat-resistant organic insulating materialsuch as an acrylic resin, polyimide, a benzocyclobutene-based resin,polyamide, or an epoxy resin is preferably used as a planarizinginsulating film. In addition to such organic insulating materials, it ispossible to use a low-dielectric constant material (a low-k material), asiloxane-based resin, phosphosilicate glass (PSG), borophosphosilicateglass (BPSG), or the like. Note that the insulating layer 4021 may beformed by stacking a plurality of insulating films formed of thesematerials.

There is no particular limitation on the method for forming theinsulating layer 4021, and the insulating layer 4021 can be formed,depending on the material, by a sputtering method, a spin coatingmethod, a dipping method, spray coating, a droplet discharge method(e.g., an inkjet method, screen printing, or offset printing), a rollcoating method, a curtain coating method, a knife coating method, or thelike.

The above display device displays an image with the use of light emittedfrom a light source or a display element; however, it may utilizereflection of external light. In either case, the thin films such as theinsulating film and the conductive film and the substrate provided forthe pixel portion each need to have a light-transmitting property withrespect to light in the visible-light wavelength range.

The first electrode layer 4030 and the second electrode layer 4031 of atransmissive liquid crystal display device and the second electrodelayer 4031 of a reflective liquid crystal display device, alight-emitting device, and an electronic paper can be formed using alight-transmitting conductive material such as indium oxide containingtungsten oxide, indium oxide containing titanium oxide, an indiumoxide-tin oxide alloy containing titanium oxide, an indium oxide-tinoxide alloy, or an indium oxide-zinc oxide alloy. Alternatively, any ofthese metal oxide materials to which silicon oxide is added may be used.

The first electrode layer 4030 of the reflective liquid crystal displaydevice, the light-emitting device, and the electronic paper can beformed using a metal such as tungsten (W), molybdenum (Mo), zirconium(Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium(Cr), cobalt (Co), nickel (Ni), titanium (Ti), platinum (Pt), aluminum(Al), copper (Cu), or silver (Ag); a nitride of these metals; or analloy of a plurality of these metals.

Since the transistor is easily broken owing to static electricity or thelike, a protection circuit for protecting the driver circuit ispreferably provided. The protection circuit is preferably formed using anonlinear element.

This embodiment can be implemented in combination with any of the otherembodiments as appropriate.

Embodiment 3

A semiconductor device having an image sensor function for reading dataof an object can be formed with the use of the transistor an example ofwhich is described in Embodiment 1.

An example of a semiconductor device having an image sensor function isillustrated in FIGS. 9A and 9B. FIG. 9A illustrates an equivalentcircuit of a photo sensor, and FIG. 9B is a cross-sectional viewillustrating part of the photo sensor.

In a photodiode 602, one electrode is electrically connected to aphotodiode reset signal line 658, and the other electrode iselectrically connected to a gate of a transistor 640. One of a sourceand a drain of the transistor 640 is electrically connected to a photosensor reference signal line 672, and the other of the source and thedrain of the transistor 640 is electrically connected to one of a sourceand a drain of a transistor 656. A gate of the transistor 656 iselectrically connected to a gate signal line 659, and the other of thesource and the drain thereof is electrically connected to a photo sensoroutput signal line 671.

Note that in a circuit diagram in this specification, a transistor whichpreferably includes an oxide semiconductor is denoted by a symbol “OS”so that it can be clearly identified as a transistor which includes anoxide semiconductor. The transistor 640 and the transistor 656 in FIG.9A are transistors each including an oxide semiconductor layer.

FIG. 9B is a cross-sectional view illustrating part of the photo sensorformed over a substrate 601 having an insulating surface, which shows astructure of the photodiode 602 and the transistor 640. A substrate 613is provided over the photodiode 602 and the transistor 640 with the useof an adhesive layer 608.

An insulating layer 631, a protective insulating layer 632, a firstinterlayer insulating layer 633, and a second interlayer insulatinglayer 634 are provided over the transistor 640. The photodiode 602 isprovided over the first interlayer insulating layer 633. In thephotodiode 602, a first semiconductor layer 606 a, a secondsemiconductor layer 606 b, and a third semiconductor layer 606 c aresequentially stacked from the first interlayer insulating layer 633side, between the electrode layer 641 formed over the first interlayerinsulating layer 633 and the electrode layer 642 formed over the secondinterlayer insulating layer 634.

In this embodiment, the transistor described in Embodiment 1 can beapplied to the transistor 640. Variation in electrical characteristicsof the transistor 640 and the transistor 656 is suppressed and thetransistor 640 and the transistor 656 are electrically stable.Therefore, a highly reliable semiconductor device can be formed with theuse of the transistor 640 and the transistor 656 for the structure ofthe photo sensor illustrated in FIGS. 9A and 9B.

The electrode layer 642 is electrically connected to the gate electrode645 through the electrode layer 641. The gate electrode 645 iselectrically connected to a gate electrode of the transistor 640, andone electrode of the photodiode 602 is electrically connected to thetransistor 640.

Here, the photodiode 602 is shown as an example of a PIN photodiode, inwhich the first semiconductor layer 606 a having p-type conductivity,the second semiconductor layer 606 b having i-type conductivity, and thethird semiconductor layer 606 c having n-type conductivity are stacked.

The first semiconductor layer 606 a is a p-type semiconductor layer andcan be formed using a silicon film containing an impurity elementimparting p-type conductivity. The second semiconductor layer 606 b isan i-type semiconductor layer and can be formed using a substantiallyintrinsic silicon film. The third semiconductor layer 606 c is an n-typesemiconductor layer and can be formed using a silicon film containing animpurity element imparting n-type conductivity.

The above silicon films can be formed by a plasma CVD method, and silane(SiH₄) may be used as a semiconductor source gas. Alternatively, Si₂H₆,SiH₂Cl₂, SiHCl₃, SiCl₄, SiF₄, or the like may be used. As another methodfor forming a silicon film, an LPCVD method, a sputtering method, or thelike can be used.

For example, the first semiconductor layer 606 a is formed to athickness of larger than or equal to 10 nm and smaller than or equal to50 nm by a plasma CVD method with the use of a semiconductor source gascontaining an impurity element belonging to Group 13 (e.g., boron (B)).The second semiconductor layer 606 b is formed to a thickness of largerthan or equal to 200 nm and smaller than or equal to 1000 nm by a plasmaCVD method with the use of only a semiconductor source gas or asemiconductor source gas to which an impurity element belonging to Group13 (e.g., boron (B)) is slightly added. The third semiconductor layer606 c is formed to a thickness of larger than or equal to 20 nm andsmaller than or equal to 200 nm by a plasma CVD method with the use of asemiconductor source gas containing an impurity element belonging toGroup 15 (e.g., phosphorus (P)).

Alternatively, the first semiconductor layer 606 a and the thirdsemiconductor layer 606 c may be formed in such a manner that a siliconfilm which does not contain an impurity element is formed and then animpurity element is introduced into the silicon film by a diffusionmethod or an ion implantation method. Heating or the like is performedafter introducing the impurity element with an ion implantation methodor the like, whereby the impurity element can be diffused.

Note that the structure of the above silicon films is not limited to anamorphous structure, and the above silicon films may have crystallinity.For example, when an i-type semiconductor layer is formed usingamorphous silicon, a sensor having light-receiving sensitivity to lightin the visible-light wavelength range can be formed. On the other hand,when an i-type semiconductor layer is formed using microcrystallinesilicon or polycrystalline silicon, a sensor having light-receivingsensitivity to not only light in the visible-light wavelength range butalso ultraviolet light can be formed. Further, in the case where ap-type semiconductor layer and an n-type semiconductor layer are formedusing microcrystalline silicon or the like, the resistance thereof canbe made smaller than that of a p-type semiconductor layer and an n-typesemiconductor layer formed using amorphous silicon.

The microcrystalline semiconductor belongs to a metastable state of anintermediate between an amorphous state and a single crystal state whenGibbs free energy is considered. That is, the microcrystallinesemiconductor is a semiconductor having a third state which is stable interms of free energy and has a short range order and lattice distortion.Columnar-like or needle-like crystals grow in a normal direction withrespect to a substrate surface. The peak of the Raman spectrum ofmicrocrystalline silicon, which is a typical example of amicrocrystalline semiconductor, is shifted to a lower wave number than520 cm⁻¹ that represents a peak of the Raman spectrum of single crystalsilicon. That is, the peak of the Raman spectrum of microcrystallinesilicon is within the range from 520 cm⁻¹ that represents single crystalsilicon, to 480 cm⁻¹ that represents amorphous silicon. Themicrocrystalline silicon contains hydrogen or halogen of at least 1 at.% to terminate a dangling bond. Moreover, microcrystalline silicon ismade to contain a rare gas element such as helium, argon, krypton, orneon to further enhance lattice distortion, whereby stability isincreased and a favorable microcrystalline semiconductor can beobtained.

This microcrystalline semiconductor can be formed by a high-frequencyplasma CVD method with a frequency of several tens of megahertz toseveral hundreds of megahertz or using a microwave plasma CVD apparatuswith a frequency of 1 GHz or more. Typically, the microcrystallinesemiconductor can be formed using a gas obtained by diluting siliconhydride, such as SiH₄, Si₂H₆, SiH₂Cl₂, SiHCl₃, SiCl₄, or SiF₄, withhydrogen. In that case, the flow ratio of hydrogen to silicon hydride is5:1 to 200:1, preferably 50:1 to 150:1, more preferably 100:1. With adilution with one or plural kinds of rare gas elements selected fromhelium, argon, krypton, and neon in addition to silicon hydride andhydrogen, the microcrystalline semiconductor can be formed.Alternatively, a carbide gas such as CH₄ or C₂H₆, a germanium gas suchas GeH₄ or GeF₄, F₂, or the like may be added to silicon hydride andhydrogen.

In addition, since the mobility of holes generated by a photoelectriceffect is lower than that of electrons, a surface on the p-typesemiconductor layer side in the PIN photodiode is preferably used as alight-receiving plane in order to extract holes efficiently. Note that asurface on the n-type semiconductor layer side can be used as alight-receiving plane. Here, the photodiode 602 is irradiated with lightfrom the substrate 601 side, over which the PIN photodiode is formed. Inorder to block light from the substrate 613 side, the electrode layer642 is preferably formed using a light-blocking conductive film.

For a reduction of the surface roughness, an insulating layer serving asa planarizing insulating film is preferably used as the first interlayerinsulating layer 633 and the second interlayer insulating layer 634. Theinsulating layer can be formed using, for example, an organic insulatingmaterial such as polyimide, an acrylic resin, a benzocyclobutene resin,polyamide, or an epoxy resin. In addition to such organic insulatingmaterials, it is possible to use a single layer of a low-dielectricconstant material (a low-k material), a siloxane-based resin,phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), or thelike or a stacked layer thereof.

The formation methods of the insulating layer 631, the protectiveinsulating layer 632, the first interlayer insulating layer 633, and thesecond interlayer insulating layer 634 are not particularly limited, andthey may each be formed using an appropriate insulating material by asputtering method, a spin coating method, a dipping method, spraycoating, a droplet discharge method (e.g., an inkjet method, screenprinting, or offset printing), a roll coating method, a curtain coatingmethod, a knife coating method, or the like.

When the light that enters the photodiode 602 is detected, data on anobject to be detected can be read. Note that external light or a lightsource such as a backlight is used at the time of reading data on theobject.

Note that the above photo sensor circuit may be provided with thedisplay element described in another embodiment. When the photo sensorcircuit is provided with the display element, it can function as a touchpanel.

The transistor one example of which is described in Embodiment 1 can beused as the transistor 640. The electrical characteristics of thetransistor including the oxide semiconductor layer, which is highlypurified by intentionally removing impurities such as hydrogen,moisture, a hydroxyl group, or hydride (also referred to as a hydrogencompound) and contains excessive oxygen supplied by oxygen doping, areless likely to change, and thus the transistor is electrically stable.Therefore, a highly reliable semiconductor device can be provided.

This embodiment can be implemented in combination with any of the otherembodiments as appropriate.

Embodiment 4

A semiconductor device disclosed in this specification can be applied toa variety of electronic devices (including amusement machines). Examplesof electronic devices include television sets (also referred to astelevisions or television receivers), monitors of computers or the like,cameras such as digital cameras or digital video cameras, digital photoframes, mobile phones (also referred to as cellular phones or cellularphone devices), portable game consoles, portable information terminals,audio reproducing devices, large-sized game machines such as pachinkomachines, and the like. Examples of electronic devices each includingthe liquid crystal display device described in the above embodiment willbe described.

FIG. 10A illustrates an electronic book reader (also referred to as ane-book reader) that can include housings 9630, a display portion 9631,operation keys 9632, a solar cell 9633, and a charge and dischargecontrol circuit 9634. The electronic book reader in FIG. 10A can have afunction of displaying a variety of information (e.g., a still image, amoving image, and a text image) on the display portion, a function ofdisplaying a calendar, a date, the time, and the like on the displayportion, a function of operating or editing the information displayed onthe display portion, a function of controlling processing by variouskinds of software (programs), and the like. Note that in FIG. 10A, astructure including a battery 9635 and a DCDC converter (hereinafterabbreviated as a converter) 9636 is illustrated as an example of thecharge and discharge control circuit 9634. By applying the semiconductordevice described in another embodiment to the display portion 9631, theelectronic book reader can be highly reliable.

In the structure of FIG. 10A, a semi-transmissive or reflective liquidcrystal display device is used as the display portion 9631, whereby theelectronic book reader is excellent in visibility even in a relativelybright environment. In such an environment, power generation by thesolar cell 9633 and charge with the battery 9635 can be efficientlyperformed. Note that the solar cell 9633 can be provided in not only theillustrated region but also a space (a surface or a rear surface) of thehousing 9630 as appropriate. When a lithium ion battery is used as thebattery 9635, there is an advantage of downsizing or the like.

The structure and the operation of the charge and discharge controlcircuit 9634 illustrated in FIG. 10A will be described with reference toa block diagram in FIG. 10B. The solar cell 9633, the battery 9635, theconverter 9636, a converter 9637, switches SW1 to SW3, and the displayportion 9631 are shown in FIG. 10B. The battery 9635, the converter9636, the converter 9637, and the switches SW1 to SW3 are included inthe charge and discharge control circuit 9634.

First, an example of operation in the case where power is generated bythe solar cell 9633 using external light is described. The voltage ofpower generated by the solar cell is raised or lowered by the converter9636 to a suitable voltage for charging the battery 9635. Then, when thepower from the solar cell 9633 is used for the operation of the displayportion 9631, the switch SW1 is turned on and the voltage of the poweris raised or lowered by the converter 9637 to a voltage needed for thedisplay portion 9631. In addition, when display on the display portion9631 is not performed, the switch SW1 is turned off and the switch SW2is turned on so that charge of the battery 9635 may be performed.

Next, operation in the case where power is not generated by the solarcell 9633 owing to lack of external light is described. The voltage ofpower accumulated in the battery 9635 is raised or lowered by theconverter 9637 by turning on the switch SW3. Then, power from thebattery 9635 is used for the operation of the display portion 9631.

Note that the solar cell is described as one example of a means forcharging, the battery 9635 may be charged with another means or with acombination of the solar cell and another means.

FIG. 11A illustrates a laptop personal computer, which includes a mainbody 3001, a housing 3002, a display portion 3003, a keyboard 3004, andthe like. By applying the semiconductor device described in anotherembodiment to the display portion 3003, the laptop personal computer canbe highly reliable.

FIG. 11B is a personal digital assistant (PDA), which includes a mainbody 3021 provided with a display portion 3023, an external interface3025, operation buttons 3024, and the like. A stylus 3022 is included asan accessory for operation. By applying the semiconductor devicedescribed in another embodiment to the display portion 3023, thepersonal digital assistant (PDA) can be highly reliable.

FIG. 11C illustrates an example of an electronic book reader. Forexample, an electronic book reader 2700 has two housings, a housing 2701and a housing 2703. The housing 2701 and the housing 2703 are combinedwith a hinge 2711. The electronic book reader 2700 can be opened andclosed with the hinge 2711 as an axis, and can operate like a paperbook.

A display portion 2705 and a display portion 2707 are incorporated inthe housing 2701 and the housing 2703, respectively. The display portion2705 and the display portion 2707 may display one image or differentimages. In the case where the display portion 2705 and the displayportion 2707 display different images, for example, text can bedisplayed on a display portion on the right side (the display portion2705 in FIG. 11C) and images can be displayed on a display portion onthe left side (the display portion 2707 in FIG. 11C). By applying thesemiconductor device described in another embodiment to the displayportions 2705 and 2707, the electronic book reader 2700 can be highlyreliable.

FIG. 11C illustrates an example in which the housing 2701 is providedwith an operation portion and the like. For example, the housing 2701 isprovided with a power switch 2721, operation keys 2723, a speaker 2725,and the like. With the operation keys 2723, pages can be turned. Notethat a keyboard, a pointing device, or the like may also be provided onthe surface of the housing, on which the display portion is provided.Furthermore, an external connection terminal (an earphone terminal, aUSB terminal, or the like), a recording medium insertion portion, andthe like may be provided on the back surface or the side surface of thehousing. Moreover, the electronic book reader 2700 may have a functionof an electronic dictionary.

The electronic book reader 2700 may have a configuration capable ofwirelessly transmitting and receiving data. Through wirelesscommunication, desired book data or the like can be purchased anddownloaded from an electronic book server.

FIG. 11D illustrates a mobile phone, which includes two housings, ahousing 2800 and a housing 2801. The housing 2801 includes a displaypanel 2802, a speaker 2803, a microphone 2804, a pointing device 2806, acamera 2807, an external connection terminal 2808, and the like. Inaddition, the housing 2800 includes a solar cell 2810 having a functionof charge of the mobile phone, an external memory slot 2811, and thelike. An antenna is incorporated in the housing 2801. By applying thesemiconductor device described in another embodiment to the displaypanel 2802, the mobile phone can be highly reliable.

Further, the display panel 2802 is provided with a touch panel. Aplurality of operation keys 2805 which are displayed as images areillustrated by dashed lines in FIG. 11D. Note that a boosting circuit bywhich a voltage output from the solar cell 2810 is increased to besufficiently high for each circuit is also provided.

The display direction of the display panel 2802 is changed asappropriate depending on a usage pattern. Further, since the mobilephone includes the camera 2807 on the same surface as the display panel2802, it can be used as a video phone. The speaker 2803 and themicrophone 2804 can be used for voice recording, playback, and the likeas well as voice calls. Furthermore, the housings 2800 and 2801 whichare developed as illustrated in FIG. 11D can overlap with each other bysliding; thus, the size of the mobile phone can be decreased, whichmakes the mobile phone suitable for being carried.

The external connection terminal 2808 can be connected to various typesof cables such as a charging cable and a USB cable, and charge and datacommunication with a personal computer or the like are possible.Further, a large amount of data can be handled by insertion of ahigh-capacity storage medium into the external memory slot 2811.

Further, in addition to the above functions, an infrared communicationfunction, a television reception function, or the like may be provided.

FIG. 11E illustrates a digital video camera, which includes a main body3051, a display portion A 3057, an eyepiece 3053, an operation switch3054, a display portion B 3055, a battery 3056, and the like. Byapplying the semiconductor device described in another embodiment to thedisplay portion A 3057 and the display portion B 3055, the digital videocamera can be highly reliable.

FIG. 11F illustrates an example of a television set. In a television set9600, a display portion 9603 is incorporated in a housing 9601. Thedisplay portion 9603 can display images. Here, the housing 9601 issupported by a stand 9605. By applying the semiconductor devicedescribed in another embodiment to the display portion 9603, thetelevision set 9600 can be highly reliable.

The television set 9600 can be operated by an operation switch of thehousing 9601 or a separate remote controller. Further, the remotecontroller may be provided with a display portion for displaying dataoutput from the remote controller.

Note that the television set 9600 is provided with a receiver, a modem,and the like. With the use of the receiver, general televisionbroadcasting can be received. Moreover, when the television set isconnected to a communication network with or without wires via themodem, one-way (from a sender to a receiver) or two-way (between asender and a receiver or between receivers) information communicationcan be performed.

This embodiment can be implemented in combination with any of the otherembodiments as appropriate.

This application is based on Japanese Patent Application serial no.2010-117332 filed with Japan Patent Office on May 21, 2010, the entirecontents of which are hereby incorporated by reference.

1. A method for manufacturing a semiconductor device, comprising thesequential steps of: forming a gate electrode layer; forming a gateinsulating layer over the gate electrode layer; forming an oxidesemiconductor layer over the gate insulating layer so as to overlap withthe gate electrode layer; increasing a temperature of the oxidesemiconductor layer in an inert gas atmosphere, a dry air atmosphere, oran oxygen atmosphere; performing heat treatment in an oxygen atmosphereafter the step of increasing the temperature of the oxide semiconductorlayer; performing heat treatment under reduced pressure after the stepof performing the heat treatment in the oxygen atmosphere; performingslow cooling in an oxygen atmosphere after the step of performing theheat treatment under the reduced pressure; forming a source electrodelayer and a drain electrode layer which are electrically connected tothe oxide semiconductor layer after the step of performing the slowcooling; and forming an insulating layer over the oxide semiconductorlayer, the source electrode layer, and the drain electrode layer.
 2. Themethod for manufacturing a semiconductor device, according to claim 1,wherein a dew point of an atmosphere gas used in increasing thetemperature, performing the heat treatment in the oxygen atmosphere,performing the heat treatment under the reduced pressure, and performingthe slow cooling is −50° C. or lower.
 3. The method for manufacturing asemiconductor device, according to claim 1, wherein a temperature of theheat treatment in the oxygen atmosphere is higher than or equal to 250°C. and lower than or equal to 650° C.
 4. The method for manufacturing asemiconductor device, according to claim 1, wherein a temperature of theheat treatment under the reduced pressure is higher than or equal to250° C. and lower than or equal to 650° C.
 5. The method formanufacturing a semiconductor device, according to claim 1, wherein theheat treatment in the oxygen atmosphere and the heat treatment under thereduced pressure are performed in a state where the oxide semiconductorlayer is irradiated with light having a wavelength longer than or equalto 350 nm and shorter than or equal to 450 nm.
 6. The method formanufacturing a semiconductor device, according to claim 1, wherein theheat treatment under the reduced pressure and the heat treatment in theoxygen atmosphere under dry condition are repeated a plurality of times.7. The method for manufacturing a semiconductor device, according toclaim 1, wherein the oxide semiconductor layer is subjected to oxygendoping treatment after the slow cooling.
 8. A method for manufacturing asemiconductor device, comprising the sequential steps of: forming a gateelectrode layer; forming a gate insulating layer over the gate electrodelayer; forming an oxide semiconductor layer over the gate insulatinglayer so as to overlap with the gate electrode layer; increasing atemperature of the oxide semiconductor layer in an inert gas atmosphere,a dry air atmosphere, or an oxygen atmosphere; performing heat treatmentunder reduced pressure after the step of increasing the temperature ofthe oxide semiconductor layer; performing heat treatment in an oxygenatmosphere after the step of performing the heat treatment under thereduced pressure, performing slow cooling in the oxygen atmosphere afterthe step of performing the heat treatment in the oxygen atmosphere;forming a source electrode layer and a drain electrode layer which areelectrically connected to the oxide semiconductor layer after the stepof performing the slow cooling; and forming an insulating layer over theoxide semiconductor layer, the source electrode layer, and the drainelectrode layer.
 9. The method for manufacturing a semiconductor device,according to claim 8, wherein a dew point of an atmosphere gas used inincreasing the temperature, performing the heat treatment in the oxygenatmosphere, performing the heat treatment under the reduced pressure,and performing the slow cooling is −50° C. or lower.
 10. The method formanufacturing a semiconductor device, according to claim 8, wherein atemperature of the heat treatment in the oxygen atmosphere is higherthan or equal to 250° C. and lower than or equal to 650° C.
 11. Themethod for manufacturing a semiconductor device, according to claim 8,wherein a temperature of the heat treatment under the reduced pressureis higher than or equal to 250° C. and lower than or equal to 650° C.12. The method for manufacturing a semiconductor device, according toclaim 8, wherein the heat treatment under the reduced pressure and theheat treatment in the oxygen atmosphere are performed in a state wherethe oxide semiconductor layer is irradiated with light having awavelength longer than or equal to 350 nm and shorter than or equal to450 nm.
 13. The method for manufacturing a semiconductor device,according to claim 8, wherein the heat treatment under the reducedpressure and the heat treatment in the oxygen atmosphere under drycondition are repeated a plurality of times.
 14. The method formanufacturing a semiconductor device, according to claim 8, wherein theoxide semiconductor layer is subjected to oxygen doping treatment afterthe step of performing the slow cooling.
 15. A method for manufacturinga semiconductor device, comprising the sequential steps of: forming anoxide semiconductor layer; increasing a temperature of the oxidesemiconductor layer in an inert gas atmosphere, a dry air atmosphere, oran oxygen atmosphere; performing first heat treatment in an oxygenatmosphere after the step of increasing the temperature of the oxidesemiconductor layer; performing second heat treatment under reducedpressure after the step of performing the first heat treatment; andperforming slow cooling in an oxygen atmosphere after the step ofperforming the second heat treatment.
 16. The method for manufacturing asemiconductor device, according to claim 15, wherein a dew point of anatmosphere gas used in increasing the temperature, performing the firstheat treatment, performing the second heat treatment, and performing theslow cooling is −50° C. or lower.
 17. The method for manufacturing asemiconductor device, according to claim 15, wherein a temperature ofthe first heat treatment is higher than or equal to 250° C. and lowerthan or equal to 650° C.
 18. The method for manufacturing asemiconductor device, according to claim 15, wherein a temperature ofthe second heat treatment is higher than or equal to 250° C. and lowerthan or equal to 650° C.
 19. The method for manufacturing asemiconductor device, according to claim 15, wherein the first heattreatment and the second heat treatment are performed in a state wherethe oxide semiconductor layer is irradiated with light having awavelength longer than or equal to 350 nm and shorter than or equal to450 nm.
 20. The method for manufacturing a semiconductor device,according to claim 15, wherein the first heat treatment under drycondition and the second heat treatment are repeated a plurality oftimes.
 21. The method for manufacturing a semiconductor device,according to claim 15, wherein the oxide semiconductor layer issubjected to oxygen doping treatment after the step of performing theslow cooling.
 22. The method for manufacturing a semiconductor device,according to claim 15, wherein an oxygen pressure in the second heattreatment is lower than an oxygen pressure in the first heat treatment.23. A method for manufacturing a semiconductor device, comprising thesequential steps of: forming an oxide semiconductor layer; increasing atemperature of the oxide semiconductor layer in an inert gas atmosphere,a dry air atmosphere, or an oxygen atmosphere; performing first heattreatment under reduced pressure after the step of increasing thetemperature of the oxide semiconductor layer; performing second heattreatment in an oxygen atmosphere after the step of performing the firstheat treatment; and performing slow cooling in the oxygen atmosphereafter the step of performing the second heat treatment.
 24. The methodfor manufacturing a semiconductor device, according to claim 23, whereina dew point of an atmosphere gas used in increasing the temperature,performing the first heat treatment, performing the second heattreatment, and performing the slow cooling is −50° C. or lower.
 25. Themethod for manufacturing a semiconductor device, according to claim 23,wherein a temperature of the first heat treatment is higher than orequal to 250° C. and lower than or equal to 650° C.
 26. The method formanufacturing a semiconductor device, according to claim 23, wherein atemperature of the second heat treatment is higher than or equal to 250°C. and lower than or equal to 650° C.
 27. The method for manufacturing asemiconductor device, according to claim 23, wherein the first heattreatment and the second heat treatment are performed in a state wherethe oxide semiconductor layer is irradiated with light having awavelength longer than or equal to 350 nm and shorter than or equal to450 nm.
 28. The method for manufacturing a semiconductor device,according to claim 23, wherein the first heat treatment and the secondheat treatment under dry condition are repeated a plurality of times.29. The method for manufacturing a semiconductor device, according toclaim 23, wherein the oxide semiconductor layer is subjected to oxygendoping treatment after the step of performing the slow cooling.
 30. Themethod for manufacturing a semiconductor device, according to claim 23,wherein an oxygen pressure in the first heat treatment is lower than anoxygen pressure in the second heat treatment.